AI's role in chip design & bringup

Namely design and then bring up. So on the design side, this clearly wasn't Astra because the RTL freeze was in July of last year. So, you know, from February to July of last year, when they claim that AI assistance helped them get an 8% reduction in SIMD area and then a 10% reduction in the matrix engine area during design, I mean, this is pre-GPT-5 that we're talking about. So conceptually, like the models have to be getting better at RTL In the meantime, but they were already good enough to rapidly accelerate the really tedious human-driven work that is RTL before a tapeout, right? And so I think maybe that's the biggest claim here, which is that I think a lot of people understand you can use these models for kernels and just software engineering because you put it in a Codex harness, you put it in a loop, you let it test the thing, and then you just set goal. And people have had that experience, they can kind of understand it, but— I don't think a lot of people can, like, have had the experience of designing a chip.